Recently, tungsten silicide and tungsten are widely used as, e.g., an electrode material of a semiconductor device. And, a polycide structure, in which metal silicide, e.g., tungsten silicide, is deposited on a polysilicon (polycrystalline silicon) layer, is widely used as a gate electrode of an MOS transistor in a semiconductor device.
For the fabrication of such a gate electrode of the polycide structure, a gate oxide (SiO2) film 202, a polysilicon layer 203, a tungsten silicide layer 204 are formed sequentially in that order on a silicon substrate 201, and a patterned mask layer 205 made of, e.g., a silicon nitride film and a photoresist is formed on the tungsten silicide layer 204, as shown in FIG. 10A.
Then, the tungsten silicide layer 204 is patterned first by being etched through the mask layer 205.
A plasma etching employing an etching gas containing, e.g., Cl2+O2 is conventionally used in such an etching process of the tungsten silicide layer 204.
Further, during the etching process of the tungsten silicide layer 204, a certain degree of an overetching is generally carried out to remove stepped portions and a certain amount of surface portion of the polysilicon layer 203 is also etched by the overetching process as shown in FIG. 10B.
And, the polysilicon layer 203 is etched after etching the tungsten silicide layer 204, so that a polycide structure having a predetermined pattern can be obtained.
As described above, a single step plasma etching process employing an etching gas containing, e.g., Cl2+O2 is generally used during a conventional etching process of the tungsten silicide layer.
In the above-mentioned conventional method, however, it is difficult to increase the selectivity of tungsten silicide with respect to polysilicon because a patterned shape is deteriorated and residues are generated when a condition is set for enhancing the selectivity of tungsten silicide with respect to polysilicon. Thus, a large amount of the underlying polysilicon layer is etched during the overetching process and there occurs a large variation in the residual amount of polysilicon layer remaining on a wafer surface after etching (designated by R in FIG. 10B).
The above-mentioned problem is aggravated especially in a case where a shape of the patterns thus formed has a dense pattern region in which adjacent patterns are close to each other and a sparse pattern region in which adjacent patterns are spaced apart from each other.
That is to say, an etching rate of the tungsten silicide varies between the dense pattern region (a diameter of a patterned hole: the distance between adjacent patterned holes=1:0.8 to 1:1) and the sparse pattern region (a diameter of a patterned hole: the distance between adjacent patterned holes=1:10 to 1:10000). The variation of etching rate in turn causes a variation of time during which the underneath polysilicon layer is exposed. The polysilicon layer is etched more at a region where the polysilicon layer is exposed earlier, so that the residual amount of polysilicon layer is less thereat; and the polysilicon layer is etched less at a region where the polysilicon layer is exposed later, so that the residual amount of polysilicon layer is greater thereat, resulting in a large variation in the residual amount of polysilicon layer.
If the residual amount of polysilicon layer is varied a lot as described above, during a subsequent step of etching the polysilicon layer, the underlying gate oxide film is exposed earlier at a region where the polysilicon layer is left in a smaller amount than at a region where the polysilicon layer remains in a larger amount. This causes a variation of time during which the gate oxide film is exposed. As a result, an earlier-exposed region of the gate oxide film is damaged to become less adequate to serve as the gate oxide film, lowering a production yield and quality.